CUSTOM-BUILT SUPERCOMPUTER TOPS ONE GIGAFLOP SUSTAINED FOR $50,000

 

11-14-1997

Irvine, Calif. -- A cluster of fast PC's linked by a high performance switch has exceeded one gigaFLOPS performance for a price of approximately $50,000. The system was sponsored by the Department of Energy and the University of California at Irvine, and was custom-built and operated by the Theoretical Physics group in the Department of Physics.

The concept of linking a set of fast PC's via a high speed network was originally developed at the NASA Goddard Space Flight Center and at CalTech's Jet Propulsion Laboratory under NASA's High Performance Computing and Communications (HPCC) program. The original design architecture is largely due to Tom Sterling, now at CalTech's Center for Advanced Computing Research (CACR).

 

Irvine's Aeneas supercomputer, which ran a particle physics simulation at 1.01 gigaFLOPS, was built for UC Irvine researchers performing leading-edge large scale numerical computations. It consists of 16 Pentium II (300MHz) processor nodes, connected through a 100-megabits-per-second high performance Fast Ethernet switch. The system has 2 gigabytes of distributed memory, a theoretical peak of 4.8 gigaFLOPS and 51 gigabytes of disk storage.

 

Similar high performance results were obtained by Donald Dabdub of the Mechanical and Aerospace Engineering department at UC Irvine, running a comprehensive atmospheric modeling program. All application codes run so far on the machine have achieved high computational efficiency, achieving over 90% utilization. The parallel supercomputer became fully operational on October 24.

 

The system was completely assembled using commodity components, such as commercially available motherboards and chipsets, Intel processors, standard SDRAM memory modules, fast IDE disks and Fast Ethernet interface cards and switches. It was custom built in less than one week, and became operational the following week. In the future electrical and computer engineering students at UC Irvine should benefit from the experience of designing and building a high-performance parallel supercomputer.

 

UC Irvine's Aeneas supercomputer is significantly faster than all commercially available workstation in the same price range, has more memory and a larger disk space. Many leading-edge research applications are just too computationally intensive and complex to be run on a single workstation. One application run completed overnight in 11 hours on the parallel supercomputer. This compares to 176 hours (about one week) that it takes a single high-powered workstation to complete the same job. Previously the same application had been run on Intel , IBM and Cray parallel supercomputers located at national supercomputer centers. These machines cost upward of half a million dollars for comparable performance, and must be accessed remotely via the Internet.

 

Processor speed, large memory and large disk storage provide a robust platform for compute-intensive applications with large datasets, such as in physics simulations, computational fluid dynamics, biochemistry, and earth and space science applications.

 

The benchmarks used by UC Irvine researchers to measure performance include a suite of highly optimized codes, which were run previously on the 512-node Thinking Machines CM5 at the National Center for Supercomputer Applications, on the 512-node IBM SP-2 at the Cornell University Theory Center, on the 256-node Cray T3-E at the San Diego Supercomputer Center, and on CalTech's Intel Paragon. The per-processor performance on UC Irvine's Aeneas supercomputer is 63 megaFLOPS/processor, which compares favorably with the 75 megaFLOPS/processor measured on the IBM SP-2 supercomputer at Cornell. It is expected that overall performance will double when the machine will be upgraded to 32 processor nodes.

 

Thanks to Sterling team’s pioneering development efforts, the Aeneas supercomputer offers a sophisticated and robust infrastructure through the Linux operating system. Linux provides full Unix functionality on Intel, DEC and Sun processors, and is easily available at no cost. It supports several programming languages, and incorporates comprehensive parallel programming environments such as MPI and PVM for parallel computation, and DQS for sophisticated process scheduling.

 

The Aeneas project demonstrates that mass market commercial computing products can be harnessed for large scale, forefront scientific computation, extending the reach beyond the limitations of workstations and allowing more researchers to pursue leading edge computational science.

 

For more information, see the Aeneas supercomputer WWW home page at:

 

http://aeneas.ps.uci.edu/aeneas

 

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Herbert Hamber, Physics

Donald Dabdub, Mechanical and Aereospace Engineering